module golden_top(
					clk_50M,
					clk_100M,
					clk_125M,
					ext_reset_n,
					epcs_flash_controller_sdo,
					epcs_flash_controller_data0,
					epcs_flash_controller_dclk,
					epcs_flash_controller_sce,
					ddr2_memory_mem_clk_n,
					ddr2_memory_mem_clk,
					ddr2_memory_mem_dqs,
					ddr2_memory_mem_dq,
					ddr2_memory_mem_dm,
					ddr2_memory_mem_ba,
					ddr2_memory_mem_addr,
					ddr2_memory_mem_cs_n,
					ddr2_memory_mem_odt,
					ddr2_memory_mem_cas_n,
					ddr2_memory_mem_we_n,
					ddr2_memory_mem_ras_n,
					ddr2_memory_mem_cke,
					tse_mac_rgmii_in,
					tse_mac_rgmii_out,
					tse_mac_rx_control,
					tse_mac_tx_control,
					tse_mac_mdc,
					tse_mac_mdio,
					tse_mac_rx_clk,
					tse_mac_resetn,
					tse_mac_gtx_clk,
					led,
					button_pio,
					sd_card_clk,
					sd_card_cs_n,
					sd_card_data_in,
					sd_card_data_out,
					alive_led,
					L0_led,
					pcie_rst_n,
					pcie_rx,
					pcie_tx
				);

input clk_50M;
input clk_100M;
input clk_125M;
input ext_reset_n;
output epcs_flash_controller_sdo;
input epcs_flash_controller_data0;
output epcs_flash_controller_dclk;
output epcs_flash_controller_sce;
inout ddr2_memory_mem_clk_n;
inout ddr2_memory_mem_clk;
inout [1:0] ddr2_memory_mem_dqs;
inout [15:0] ddr2_memory_mem_dq;
output [1:0] ddr2_memory_mem_dm;
output [2:0] ddr2_memory_mem_ba;
output [12:0] ddr2_memory_mem_addr;
output ddr2_memory_mem_cs_n;
output ddr2_memory_mem_odt;
output ddr2_memory_mem_cas_n;
output ddr2_memory_mem_we_n;
output ddr2_memory_mem_ras_n;
output ddr2_memory_mem_cke;
input [3:0] tse_mac_rgmii_in;
output [3:0] tse_mac_rgmii_out;
input tse_mac_rx_control;
output tse_mac_tx_control;
output tse_mac_mdc;
inout tse_mac_mdio;
input tse_mac_rx_clk;
output tse_mac_resetn;
output tse_mac_gtx_clk;
output [3:0] led;
input button_pio;
output sd_card_clk;
output sd_card_cs_n;
input sd_card_data_in;
output sd_card_data_out;
output alive_led;
output L0_led;
input pcie_rst_n;
input pcie_rx;
output pcie_tx;

endmodule
