<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
 <component
   name="$${FILENAME}"
   displayName="$${FILENAME}"
   version="1.0"
   description=""
   tags=""
   categories="System" />
 <parameter name="bonusData"><![CDATA[bonusData 
{
   element $${FILENAME}
   {
   }
   element CPU
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
   }
   element DDR2
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element RAM
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
   }
   element jtag_uart.avalon_jtag_slave
   {
      datum baseAddress
      {
         value = "12480";
         type = "long";
      }
   }
   element sd_card.avalon_slave
   {
      datum baseAddress
      {
         value = "11264";
         type = "long";
      }
   }
   element button_pio
   {
      datum _sortIndex
      {
         value = "11";
         type = "int";
      }
   }
   element sgdma_tx.clk
   {
      datum _tags
      {
         value = "";
         type = "String";
      }
   }
   element clk_0
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
   }
   element tse_mac.control_port
   {
      datum baseAddress
      {
         value = "10240";
         type = "long";
      }
   }
   element sgdma_tx.csr
   {
      datum baseAddress
      {
         value = "12352";
         type = "long";
      }
   }
   element sgdma_rx.csr
   {
      datum baseAddress
      {
         value = "12288";
         type = "long";
      }
   }
   element CPU.data_master
   {
      datum _tags
      {
         value = "";
         type = "String";
      }
   }
   element descriptor_memory
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
   }
   element epcs_flash_controller.epcs_control_port
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum _tags
      {
         value = "";
         type = "String";
      }
   }
   element epcs_flash_controller
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element ext_flash
   {
      datum _sortIndex
      {
         value = "12";
         type = "int";
      }
   }
   element ext_flash_bridge
   {
      datum _sortIndex
      {
         value = "13";
         type = "int";
      }
   }
   element CPU.jtag_debug_module
   {
      datum baseAddress
      {
         value = "8192";
         type = "long";
      }
   }
   element jtag_uart
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
   }
   element led_pio
   {
      datum _sortIndex
      {
         value = "10";
         type = "int";
      }
   }
   element jtag_uart.reset
   {
      datum _tags
      {
         value = "";
         type = "String";
      }
   }
   element epcs_flash_controller.reset
   {
      datum _tags
      {
         value = "";
         type = "String";
      }
   }
   element sys_timer.s1
   {
      datum baseAddress
      {
         value = "12416";
         type = "long";
      }
   }
   element button_pio.s1
   {
      datum baseAddress
      {
         value = "12464";
         type = "long";
      }
   }
   element RAM.s1
   {
      datum baseAddress
      {
         value = "32768";
         type = "long";
      }
   }
   element led_pio.s1
   {
      datum baseAddress
      {
         value = "12448";
         type = "long";
      }
   }
   element descriptor_memory.s1
   {
      datum baseAddress
      {
         value = "4096";
         type = "long";
      }
   }
   element DDR2.s1
   {
      datum baseAddress
      {
         value = "134217728";
         type = "long";
      }
   }
   element sd_card
   {
      datum _sortIndex
      {
         value = "15";
         type = "int";
      }
   }
   element sgdma_rx
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
   }
   element sgdma_tx
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
   }
   element sys_timer
   {
      datum _sortIndex
      {
         value = "14";
         type = "int";
      }
   }
   element tse_mac
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=D:\\Work_Dir\\Demos\\cytech_kit\\Easy_GX\\NIOS_TEST_tse}";
         type = "String";
      }
   }
   element ext_flash.uas
   {
      datum baseAddress
      {
         value = "33554432";
         type = "long";
      }
   }
}
]]></parameter>
 <parameter name="clockCrossingAdapter" value="FIFO" />
 <parameter name="device" value="EP4CGX22CF19C8" />
 <parameter name="deviceFamily" value="Cyclone IV GX" />
 <parameter name="deviceSpeedGrade" value="8" />
 <parameter name="fabricMode" value="QSYS" />
 <parameter name="generateLegacySim" value="false" />
 <parameter name="generationId" value="0" />
 <parameter name="globalResetBus" value="false" />
 <parameter name="hdlLanguage" value="VERILOG" />
 <parameter name="maxAdditionalLatency" value="1" />
 <parameter name="projectName" value="NIOS_SOC.qpf" />
 <parameter name="sopcBorderPoints" value="false" />
 <parameter name="systemHash" value="1" />
 <parameter name="timeStamp" value="1346591466753" />
 <parameter name="useTestBenchNamingPattern" value="false" />
 <instanceScript></instanceScript>
 <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
 <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
 <interface name="ddr2_memory" internal="DDR2.memory" type="conduit" dir="end" />
 <interface
   name="epcs_flash_controller_external"
   internal="epcs_flash_controller.external"
   type="conduit"
   dir="end" />
 <interface
   name="tse_mac"
   internal="tse_mac.conduit_connection"
   type="conduit"
   dir="end" />
 <interface
   name="ddr2_external_connection"
   internal="DDR2.external_connection"
   type="conduit"
   dir="end" />
 <interface
   name="led_pio"
   internal="led_pio.external_connection"
   type="conduit"
   dir="end" />
 <interface
   name="button_pio"
   internal="button_pio.external_connection"
   type="conduit"
   dir="end" />
 <interface
   name="ext_flash_bridge_out"
   internal="ext_flash_bridge.out"
   type="conduit"
   dir="end" />
 <interface
   name="sd_card_end"
   internal="sd_card.conduit_end"
   type="conduit"
   dir="end" />
 <module kind="clock_source" version="12.0" enabled="1" name="clk_0">
  <parameter name="clockFrequency" value="50000000" />
  <parameter name="clockFrequencyKnown" value="true" />
  <parameter name="inputClockFrequency" value="0" />
  <parameter name="resetSynchronousEdges" value="NONE" />
 </module>
 <module kind="altera_nios2_qsys" version="12.0" enabled="1" name="CPU">
  <parameter name="setting_showUnpublishedSettings" value="false" />
  <parameter name="setting_showInternalSettings" value="false" />
  <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
  <parameter name="setting_preciseIllegalMemAccessException" value="false" />
  <parameter name="setting_preciseDivisionErrorException" value="false" />
  <parameter name="setting_performanceCounter" value="false" />
  <parameter name="setting_illegalMemAccessDetection" value="false" />
  <parameter name="setting_illegalInstructionsTrap" value="false" />
  <parameter name="setting_fullWaveformSignals" value="false" />
  <parameter name="setting_extraExceptionInfo" value="false" />
  <parameter name="setting_exportPCB" value="false" />
  <parameter name="setting_debugSimGen" value="false" />
  <parameter name="setting_clearXBitsLDNonBypass" value="true" />
  <parameter name="setting_bit31BypassDCache" value="true" />
  <parameter name="setting_bigEndian" value="false" />
  <parameter name="setting_bhtIndexPcOnly" value="false" />
  <parameter name="setting_avalonDebugPortPresent" value="false" />
  <parameter name="setting_alwaysEncrypt" value="true" />
  <parameter name="setting_allowFullAddressRange" value="false" />
  <parameter name="setting_activateTrace" value="true" />
  <parameter name="setting_activateTestEndChecker" value="false" />
  <parameter name="setting_activateMonitors" value="true" />
  <parameter name="setting_activateModelChecker" value="false" />
  <parameter name="setting_HDLSimCachesCleared" value="true" />
  <parameter name="setting_HBreakTest" value="false" />
  <parameter name="muldiv_divider" value="false" />
  <parameter name="mpu_useLimit" value="false" />
  <parameter name="mpu_enabled" value="false" />
  <parameter name="mmu_enabled" value="false" />
  <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
  <parameter name="manuallyAssignCpuID" value="true" />
  <parameter name="debug_triggerArming" value="true" />
  <parameter name="debug_embeddedPLL" value="true" />
  <parameter name="debug_debugReqSignals" value="false" />
  <parameter name="debug_assignJtagInstanceID" value="false" />
  <parameter name="dcache_omitDataMaster" value="false" />
  <parameter name="cpuReset" value="false" />
  <parameter name="is_hardcopy_compatible" value="false" />
  <parameter name="setting_shadowRegisterSets" value="0" />
  <parameter name="mpu_numOfInstRegion" value="8" />
  <parameter name="mpu_numOfDataRegion" value="8" />
  <parameter name="mmu_TLBMissExcOffset" value="0" />
  <parameter name="debug_jtagInstanceID" value="0" />
  <parameter name="resetOffset" value="0" />
  <parameter name="exceptionOffset" value="32" />
  <parameter name="cpuID" value="0" />
  <parameter name="cpuID_stored" value="0" />
  <parameter name="breakOffset" value="32" />
  <parameter name="userDefinedSettings" value="" />
  <parameter name="resetSlave">epcs_flash_controller.epcs_control_port</parameter>
  <parameter name="mmu_TLBMissExcSlave" value="" />
  <parameter name="exceptionSlave" value="RAM.s1" />
  <parameter name="breakSlave">CPU.jtag_debug_module</parameter>
  <parameter name="setting_perfCounterWidth" value="32" />
  <parameter name="setting_interruptControllerType" value="Internal" />
  <parameter name="setting_branchPredictionType" value="Automatic" />
  <parameter name="setting_bhtPtrSz" value="8" />
  <parameter name="muldiv_multiplierType" value="EmbeddedMulFast" />
  <parameter name="mpu_minInstRegionSize" value="12" />
  <parameter name="mpu_minDataRegionSize" value="12" />
  <parameter name="mmu_uitlbNumEntries" value="4" />
  <parameter name="mmu_udtlbNumEntries" value="6" />
  <parameter name="mmu_tlbPtrSz" value="7" />
  <parameter name="mmu_tlbNumWays" value="16" />
  <parameter name="mmu_processIDNumBits" value="8" />
  <parameter name="impl" value="Fast" />
  <parameter name="icache_size" value="4096" />
  <parameter name="icache_ramBlockType" value="Automatic" />
  <parameter name="icache_numTCIM" value="0" />
  <parameter name="icache_burstType" value="None" />
  <parameter name="dcache_bursts" value="false" />
  <parameter name="debug_level" value="Level1" />
  <parameter name="debug_OCIOnchipTrace" value="_128" />
  <parameter name="dcache_size" value="2048" />
  <parameter name="dcache_ramBlockType" value="Automatic" />
  <parameter name="dcache_numTCDM" value="0" />
  <parameter name="dcache_lineSize" value="32" />
  <parameter name="instAddrWidth" value="28" />
  <parameter name="dataAddrWidth" value="28" />
  <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='epcs_flash_controller.epcs_control_port' start='0x0' end='0x800' /><slave name='CPU.jtag_debug_module' start='0x2000' end='0x2800' /><slave name='RAM.s1' start='0x8000' end='0x9000' /><slave name='ext_flash.uas' start='0x2000000' end='0x3000000' /><slave name='DDR2.s1' start='0x8000000' end='0xC000000' /></address-map>]]></parameter>
  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='epcs_flash_controller.epcs_control_port' start='0x0' end='0x800' /><slave name='descriptor_memory.s1' start='0x1000' end='0x2000' /><slave name='CPU.jtag_debug_module' start='0x2000' end='0x2800' /><slave name='tse_mac.control_port' start='0x2800' end='0x2C00' /><slave name='sd_card.avalon_slave' start='0x2C00' end='0x3000' /><slave name='sgdma_rx.csr' start='0x3000' end='0x3040' /><slave name='sgdma_tx.csr' start='0x3040' end='0x3080' /><slave name='sys_timer.s1' start='0x3080' end='0x30A0' /><slave name='led_pio.s1' start='0x30A0' end='0x30B0' /><slave name='button_pio.s1' start='0x30B0' end='0x30C0' /><slave name='jtag_uart.avalon_jtag_slave' start='0x30C0' end='0x30C8' /><slave name='RAM.s1' start='0x8000' end='0x9000' /><slave name='ext_flash.uas' start='0x2000000' end='0x3000000' /><slave name='DDR2.s1' start='0x8000000' end='0xC000000' /></address-map>]]></parameter>
  <parameter name="clockFrequency" value="75000000" />
  <parameter name="deviceFamilyName" value="Cyclone IV GX" />
  <parameter name="internalIrqMaskSystemInfo" value="63" />
  <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
  <parameter name="deviceFeaturesSystemInfo">NOT_LISTED 0 INSTALLED 1 IS_DEFAULT_FAMILY 1 ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 IS_CONFIG_ROM 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
  <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
 </module>
 <module
   kind="altera_avalon_onchip_memory2"
   version="12.0"
   enabled="1"
   name="RAM">
  <parameter name="allowInSystemMemoryContentEditor" value="false" />
  <parameter name="autoInitializationFileName" value="FULL_SYS_RAM" />
  <parameter name="blockType" value="AUTO" />
  <parameter name="dataWidth" value="32" />
  <parameter name="deviceFamily" value="Cyclone IV GX" />
  <parameter name="dualPort" value="false" />
  <parameter name="initMemContent" value="true" />
  <parameter name="initializationFileName" value="RAM" />
  <parameter name="instanceID" value="NONE" />
  <parameter name="memorySize" value="4096" />
  <parameter name="readDuringWriteMode" value="DONT_CARE" />
  <parameter name="simAllowMRAMContentsFile" value="false" />
  <parameter name="simMemInitOnlyFilename" value="0" />
  <parameter name="singleClockOperation" value="false" />
  <parameter name="slave1Latency" value="1" />
  <parameter name="slave2Latency" value="1" />
  <parameter name="useNonDefaultInitFile" value="false" />
  <parameter name="useShallowMemBlocks" value="false" />
  <parameter name="writable" value="true" />
 </module>
 <module
   kind="altera_avalon_epcs_flash_controller"
   version="12.0"
   enabled="1"
   name="epcs_flash_controller">
  <parameter name="autoSelectASMIAtom" value="true" />
  <parameter name="clockRate" value="75000000" />
  <parameter name="deviceFamilyString" value="Cyclone IV GX" />
  <parameter name="useASMIAtom" value="false" />
 </module>
 <module kind="altmemddr2" version="12.0" enabled="1" name="DDR2">
  <parameter name="pipeline_commands" value="false" />
  <parameter name="debug_en" value="false" />
  <parameter name="export_debug_port" value="false" />
  <parameter name="use_generated_memory_model" value="true" />
  <parameter name="dedicated_memory_clk_phase_label">Dedicated memory clock phase:</parameter>
  <parameter name="mem_if_clk_mhz" value="150.0" />
  <parameter name="quartus_project_exists" value="false" />
  <parameter name="local_if_drate" value="Half" />
  <parameter name="enable_v72_rsu" value="false" />
  <parameter name="local_if_clk_mhz_label" value="75.0" />
  <parameter name="new_variant" value="true" />
  <parameter name="mem_if_memtype" value="DDR2 SDRAM" />
  <parameter name="pll_ref_clk_mhz" value="50.0" />
  <parameter name="mem_if_clk_ps_label" value="(6667 ps)" />
  <parameter name="family" value="Cyclone IV GX" />
  <parameter name="project_family" value="Cyclone IV GX" />
  <parameter name="speed_grade" value="8" />
  <parameter name="dedicated_memory_clk_phase" value="0" />
  <parameter name="pll_ref_clk_ps_label" value="(20000 ps)" />
  <parameter name="avalon_burst_length" value="1" />
  <parameter name="mem_if_clk_pair_count" value="1" />
  <parameter name="mem_if_cs_per_dimm" value="1" />
  <parameter name="pre_latency_label">Fix read latency at:</parameter>
  <parameter name="dedicated_memory_clk_en" value="false" />
  <parameter name="mirror_addressing" value="0" />
  <parameter name="mem_if_bankaddr_width" value="3" />
  <parameter name="register_control_word_9" value="0000" />
  <parameter name="mem_if_rowaddr_width" value="13" />
  <parameter name="mem_dyn_deskew_en" value="false" />
  <parameter name="post_latency_label">cycles (0 cycles=minimum latency, non-deterministic)</parameter>
  <parameter name="mem_if_dm_pins_en" value="Yes" />
  <parameter name="local_if_dwidth_label" value="64" />
  <parameter name="register_control_word_7" value="0000" />
  <parameter name="register_control_word_8" value="0000" />
  <parameter name="mem_if_preset">Custom (MT47H32M16HR-25E)</parameter>
  <parameter name="mem_if_pchaddr_bit" value="10" />
  <parameter name="WIDTH_RATIO" value="4" />
  <parameter name="vendor" value="Micron" />
  <parameter name="register_control_word_3" value="0000" />
  <parameter name="register_control_word_4" value="0000" />
  <parameter name="chip_or_dimm" value="Discrete Device" />
  <parameter name="register_control_word_5" value="0000" />
  <parameter name="register_control_word_6" value="0000" />
  <parameter name="mem_fmax" value="267.0" />
  <parameter name="register_control_word_0" value="0000" />
  <parameter name="register_control_word_size" value="4" />
  <parameter name="register_control_word_1" value="0000" />
  <parameter name="register_control_word_2" value="0000" />
  <parameter name="register_control_word_11" value="0000" />
  <parameter name="register_control_word_10" value="0000" />
  <parameter name="mem_if_cs_width" value="1" />
  <parameter name="mem_if_preset_rlat" value="0" />
  <parameter name="mem_if_cs_per_rank" value="1" />
  <parameter name="fast_simulation_en" value="FAST" />
  <parameter name="register_control_word_15" value="0000" />
  <parameter name="register_control_word_14" value="0000" />
  <parameter name="mem_if_dwidth" value="16" />
  <parameter name="mem_if_dq_per_dqs" value="8" />
  <parameter name="mem_if_coladdr_width" value="9" />
  <parameter name="register_control_word_13" value="0000" />
  <parameter name="register_control_word_12" value="0000" />
  <parameter name="mem_tiha_ps" value="500" />
  <parameter name="mem_tdsh_ck" value="0.2" />
  <parameter name="mem_if_trfc_ns" value="75.0" />
  <parameter name="mem_tqh_ck" value="0.36" />
  <parameter name="mem_tisa_ps" value="500" />
  <parameter name="mem_tdss_ck" value="0.2" />
  <parameter name="mem_trtp_ns" value="8.8" />
  <parameter name="mem_if_tinit_us" value="200.0" />
  <parameter name="mem_if_trcd_ns" value="15.0" />
  <parameter name="mem_if_twtr_ck" value="2" />
  <parameter name="mem_trrd_ns" value="10.0" />
  <parameter name="mem_tdqss_ck" value="0.25" />
  <parameter name="mem_tqhs_ps" value="400" />
  <parameter name="mem_tdsa_ps" value="345" />
  <parameter name="mem_tac_ps" value="500" />
  <parameter name="mem_tdha_ps" value="285" />
  <parameter name="mem_if_tras_ns" value="40.0" />
  <parameter name="mem_if_twr_ns" value="15.0" />
  <parameter name="mem_tdqsck_ps" value="450" />
  <parameter name="mem_if_trp_ns" value="15.0" />
  <parameter name="mem_tdqsq_ps" value="300" />
  <parameter name="mem_if_tmrd_ns" value="7.5" />
  <parameter name="mem_tfaw_ns" value="50.0" />
  <parameter name="mem_if_trefi_us" value="7.8" />
  <parameter name="mem_tcl_40_fmax" value="267.0" />
  <parameter name="mem_odt" value="Disabled" />
  <parameter name="mp_WLH_percent" value="0.6" />
  <parameter name="mem_drv_str" value="Normal" />
  <parameter name="mp_DH_percent" value="0.5" />
  <parameter name="input_period" value="0" />
  <parameter name="mp_QH_percent" value="0.5" />
  <parameter name="mp_QHS_percent" value="0.5" />
  <parameter name="mem_tcl_30_fmax" value="200.0" />
  <parameter name="ac_clk_select" value="90" />
  <parameter name="mp_DQSQ_percent" value="0.65" />
  <parameter name="mp_DS_percent" value="0.6" />
  <parameter name="pll_reconfig_ports_en" value="false" />
  <parameter name="mem_btype" value="Sequential" />
  <parameter name="mp_IS_percent" value="0.7" />
  <parameter name="mem_tcl" value="5.0" />
  <parameter name="mp_DQSS_percent" value="0.5" />
  <parameter name="export_bank_info" value="false" />
  <parameter name="mp_DSS_percent" value="0.6" />
  <parameter name="mem_dll_en" value="Yes" />
  <parameter name="ac_phase" value="90" />
  <parameter name="mem_if_oct_en" value="false" />
  <parameter name="mem_tcl_60_fmax" value="267.0" />
  <parameter name="mp_DSH_percent" value="0.6" />
  <parameter name="mem_if_dqsn_en" value="false" />
  <parameter name="enable_mp_calibration" value="true" />
  <parameter name="mp_IH_percent" value="0.6" />
  <parameter name="mem_tcl_15_fmax" value="533.0" />
  <parameter name="dll_external" value="false" />
  <parameter name="mem_bl" value="8" />
  <parameter name="mp_WLS_percent" value="0.7" />
  <parameter name="mem_tcl_50_fmax" value="267.0" />
  <parameter name="mp_DQSCK_percent" value="0.5" />
  <parameter name="mem_tcl_25_fmax" value="533.0" />
  <parameter name="mem_tcl_20_fmax" value="533.0" />
  <parameter name="cfg_reorder_data" value="true" />
  <parameter name="ctl_ecc_en" value="false" />
  <parameter name="ctl_hrb_en" value="false" />
  <parameter name="ref_clk_source" value="clk_0" />
  <parameter name="cfg_data_reordering_type" value="INTER_BANK" />
  <parameter name="ctl_powerdn_en" value="false" />
  <parameter name="multicast_wr_en" value="false" />
  <parameter name="auto_powerdn_cycles" value="0" />
  <parameter name="ctl_self_refresh_en" value="false" />
  <parameter name="cfg_starve_limit" value="10" />
  <parameter name="shared_sys_clk_source" value="" />
  <parameter name="ctl_latency" value="0" />
  <parameter name="tool_context" value="SOPC_BUILDER" />
  <parameter name="mem_addr_mapping" value="CHIP_ROW_BANK_COL" />
  <parameter name="burst_merge_en" value="false" />
  <parameter name="user_refresh_en" value="false" />
  <parameter name="qsys_mode" value="true" />
  <parameter name="clk_source_sharing_en" value="false" />
  <parameter name="ctl_lookahead_depth" value="4" />
  <parameter name="ctl_autopch_en" value="false" />
  <parameter name="ctl_dynamic_bank_allocation" value="false" />
  <parameter name="ctl_dynamic_bank_num" value="4" />
  <parameter name="local_if_type_avalon" value="true" />
  <parameter name="csr_en" value="false" />
  <parameter name="ctl_auto_correct_en" value="false" />
  <parameter name="auto_powerdn_en" value="false" />
  <parameter name="phy_if_type_afi" value="true" />
  <parameter name="controller_type" value="ngv110_ctl" />
  <parameter name="max_local_size" value="4" />
  <parameter name="mem_srtr" value="Normal" />
  <parameter name="mem_mpr_loc" value="Predefined Pattern" />
  <parameter name="dss_tinit_rst_us" value="200.0" />
  <parameter name="mem_tcl_90_fmax" value="400.0" />
  <parameter name="mem_rtt_wr" value="Dynamic ODT off" />
  <parameter name="mem_tcl_100_fmax" value="400.0" />
  <parameter name="mem_pasr" value="Full Array" />
  <parameter name="mem_asrm">Manual SR Reference (SRT)</parameter>
  <parameter name="mem_mpr_oper" value="Predefined Pattern" />
  <parameter name="mem_tcl_80_fmax" value="400.0" />
  <parameter name="mem_drv_impedance" value="RZQ/7" />
  <parameter name="mem_rtt_nom" value="ODT Disabled" />
  <parameter name="mem_tcl_70_fmax" value="400.0" />
  <parameter name="mem_wtcl" value="5.0" />
  <parameter name="mem_dll_pch" value="Fast Exit" />
  <parameter name="mem_atcl" value="Disabled" />
  <parameter name="board_settings_valid" value="true" />
  <parameter name="t_IH" value="0.5" />
  <parameter name="board_intra_DQS_group_skew" value="0.02" />
  <parameter name="isi_DQS" value="0.0" />
  <parameter name="addr_cmd_slew_rate" value="1.0" />
  <parameter name="board_tpd_inter_DIMM" value="0.05" />
  <parameter name="board_addresscmd_CK_skew" value="0.0" />
  <parameter name="t_DS_calculated" value="0.350" />
  <parameter name="isi_addresscmd_hold" value="0.0" />
  <parameter name="t_IS" value="0.5" />
  <parameter name="restore_default_toggle" value="false" />
  <parameter name="dqs_dqsn_slew_rate" value="2.0" />
  <parameter name="dq_slew_rate" value="1.0" />
  <parameter name="board_inter_DQS_group_skew" value="0.02" />
  <parameter name="isi_addresscmd_setup" value="0.0" />
  <parameter name="board_minCK_DQS_skew" value="-0.01" />
  <parameter name="t_IS_calculated" value="0.500" />
  <parameter name="num_slots_or_devices" value="1" />
  <parameter name="board_maxCK_DQS_skew" value="0.01" />
  <parameter name="board_skew_ps" value="20" />
  <parameter name="t_DH" value="0.35" />
  <parameter name="ck_ckn_slew_rate" value="2.0" />
  <parameter name="isi_DQ" value="0.0" />
  <parameter name="t_IH_calculated" value="0.500" />
  <parameter name="t_DH_calculated" value="0.350" />
  <parameter name="t_DS" value="0.35" />
 </module>
 <module
   kind="altera_avalon_jtag_uart"
   version="12.0"
   enabled="1"
   name="jtag_uart">
  <parameter name="allowMultipleConnections" value="false" />
  <parameter name="avalonSpec" value="2.0" />
  <parameter name="hubInstanceID" value="0" />
  <parameter name="readBufferDepth" value="64" />
  <parameter name="readIRQThreshold" value="8" />
  <parameter name="simInputCharacterStream" value="" />
  <parameter name="simInteractiveOptions">INTERACTIVE_ASCII_OUTPUT</parameter>
  <parameter name="useRegistersForReadBuffer" value="false" />
  <parameter name="useRegistersForWriteBuffer" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
  <parameter name="writeBufferDepth" value="64" />
  <parameter name="writeIRQThreshold" value="8" />
 </module>
 <module
   kind="altera_avalon_onchip_memory2"
   version="12.0"
   enabled="1"
   name="descriptor_memory">
  <parameter name="allowInSystemMemoryContentEditor" value="false" />
  <parameter name="autoInitializationFileName">FULL_SYS_descriptor_memory</parameter>
  <parameter name="blockType" value="AUTO" />
  <parameter name="dataWidth" value="32" />
  <parameter name="deviceFamily" value="Cyclone IV GX" />
  <parameter name="dualPort" value="false" />
  <parameter name="initMemContent" value="true" />
  <parameter name="initializationFileName" value="descriptor_memory" />
  <parameter name="instanceID" value="NONE" />
  <parameter name="memorySize" value="4096" />
  <parameter name="readDuringWriteMode" value="DONT_CARE" />
  <parameter name="simAllowMRAMContentsFile" value="false" />
  <parameter name="simMemInitOnlyFilename" value="0" />
  <parameter name="singleClockOperation" value="false" />
  <parameter name="slave1Latency" value="1" />
  <parameter name="slave2Latency" value="1" />
  <parameter name="useNonDefaultInitFile" value="false" />
  <parameter name="useShallowMemBlocks" value="false" />
  <parameter name="writable" value="true" />
 </module>
 <module kind="altera_avalon_sgdma" version="12.0" enabled="1" name="sgdma_tx">
  <parameter name="addressWidth" value="32" />
  <parameter name="alwaysDoMaxBurst" value="true" />
  <parameter name="avalonMMByteReorderMode" value="0" />
  <parameter name="dataTransferFIFODepth" value="2" />
  <parameter name="deviceFamilyString" value="Cyclone IV GX" />
  <parameter name="enableBurstTransfers" value="false" />
  <parameter name="enableDescriptorReadMasterBurst" value="false" />
  <parameter name="enableUnalignedTransfers" value="false" />
  <parameter name="internalFIFODepth" value="2" />
  <parameter name="readBlockDataWidth" value="32" />
  <parameter name="readBurstcountWidth" value="4" />
  <parameter name="sinkErrorWidth" value="0" />
  <parameter name="sourceErrorWidth" value="1" />
  <parameter name="transferMode" value="MEMORY_TO_STREAM" />
  <parameter name="writeBurstcountWidth" value="4" />
 </module>
 <module kind="altera_avalon_sgdma" version="12.0" enabled="1" name="sgdma_rx">
  <parameter name="addressWidth" value="32" />
  <parameter name="alwaysDoMaxBurst" value="true" />
  <parameter name="avalonMMByteReorderMode" value="0" />
  <parameter name="dataTransferFIFODepth" value="2" />
  <parameter name="deviceFamilyString" value="Cyclone IV GX" />
  <parameter name="enableBurstTransfers" value="false" />
  <parameter name="enableDescriptorReadMasterBurst" value="false" />
  <parameter name="enableUnalignedTransfers" value="false" />
  <parameter name="internalFIFODepth" value="2" />
  <parameter name="readBlockDataWidth" value="32" />
  <parameter name="readBurstcountWidth" value="4" />
  <parameter name="sinkErrorWidth" value="6" />
  <parameter name="sourceErrorWidth" value="0" />
  <parameter name="transferMode" value="STREAM_TO_MEMORY" />
  <parameter name="writeBurstcountWidth" value="4" />
 </module>
 <module
   kind="triple_speed_ethernet"
   version="12.0"
   enabled="1"
   name="tse_mac">
  <parameter name="atlanticSinkClockRate" value="0" />
  <parameter name="atlanticSinkClockSource" value="unassigned" />
  <parameter name="atlanticSourceClockRate" value="0" />
  <parameter name="atlanticSourceClockSource" value="unassigned" />
  <parameter name="avalonSlaveClockRate" value="0" />
  <parameter name="avalonSlaveClockSource" value="unassigned" />
  <parameter name="avalonStNeighbours">unassigned=unassigned</parameter>
  <parameter name="channel_count" value="1" />
  <parameter name="core_variation" value="MAC_ONLY" />
  <parameter name="core_version" value="3072" />
  <parameter name="crc32check16bit" value="0" />
  <parameter name="crc32dwidth" value="8" />
  <parameter name="crc32gendelay" value="6" />
  <parameter name="crc32s1l2_extern" value="false" />
  <parameter name="cust_version" value="0" />
  <parameter name="dataBitsPerSymbol" value="8" />
  <parameter name="dev_version" value="3072" />
  <parameter name="deviceFamily" value="STINGRAY" />
  <parameter name="deviceFamilyName" value="Cyclone IV GX" />
  <parameter name="eg_addr" value="11" />
  <parameter name="ena_hash" value="false" />
  <parameter name="enable_alt_reconfig" value="false" />
  <parameter name="enable_clk_sharing" value="false" />
  <parameter name="enable_ena" value="32" />
  <parameter name="enable_fifoless" value="false" />
  <parameter name="enable_gmii_loopback" value="false" />
  <parameter name="enable_hd_logic" value="true" />
  <parameter name="enable_mac_flow_ctrl" value="true" />
  <parameter name="enable_mac_txaddr_set" value="true" />
  <parameter name="enable_mac_vlan" value="false" />
  <parameter name="enable_maclite" value="false" />
  <parameter name="enable_magic_detect" value="true" />
  <parameter name="enable_multi_channel" value="false" />
  <parameter name="enable_pkt_class" value="true" />
  <parameter name="enable_pma" value="false" />
  <parameter name="enable_ptp_1step" value="false" />
  <parameter name="enable_reg_sharing" value="false" />
  <parameter name="enable_sgmii" value="false" />
  <parameter name="enable_shift16" value="true" />
  <parameter name="enable_sup_addr" value="false" />
  <parameter name="enable_timestamping" value="false" />
  <parameter name="enable_use_internal_fifo" value="true" />
  <parameter name="export_calblkclk" value="false" />
  <parameter name="export_pwrdn" value="false" />
  <parameter name="ext_stat_cnt_ena" value="false" />
  <parameter name="gigeAdvanceMode" value="true" />
  <parameter name="ifGMII" value="RGMII" />
  <parameter name="ifPCSuseEmbeddedSerdes" value="false" />
  <parameter name="ing_addr" value="11" />
  <parameter name="insert_ta" value="true" />
  <parameter name="maclite_gige" value="false" />
  <parameter name="max_channels" value="1" />
  <parameter name="mdio_clk_div" value="40" />
  <parameter name="phy_identifier" value="0" />
  <parameter name="ramType" value="AUTO" />
  <parameter name="reset_level" value="1" />
  <parameter name="starting_channel_number" value="0" />
  <parameter name="stat_cnt_ena" value="true" />
  <parameter name="timingAdapterName" value="timingAdapter" />
  <parameter name="toolContext" value="SOPC_BUILDER" />
  <parameter name="transceiver_type" value="GXB" />
  <parameter name="tstamp_fp_width" value="4" />
  <parameter name="uiHostClockFrequency" value="0" />
  <parameter name="uiMDIOFreq" value="0.0 MHz" />
  <parameter name="useLvds" value="false" />
  <parameter name="useMAC" value="true" />
  <parameter name="useMDIO" value="true" />
  <parameter name="usePCS" value="false" />
  <parameter name="use_sync_reset" value="true" />
 </module>
 <module kind="altera_avalon_pio" version="12.0" enabled="1" name="led_pio">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="75000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="4" />
 </module>
 <module kind="altera_avalon_pio" version="12.0" enabled="1" name="button_pio">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="75000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module
   kind="altera_generic_tristate_controller"
   version="12.0"
   enabled="1"
   name="ext_flash">
  <parameter name="TCM_ADDRESS_W" value="24" />
  <parameter name="TCM_DATA_W" value="16" />
  <parameter name="TCM_BYTEENABLE_W" value="2" />
  <parameter name="TCM_READ_WAIT" value="100" />
  <parameter name="TCM_WRITE_WAIT" value="100" />
  <parameter name="TCM_SETUP_WAIT" value="60" />
  <parameter name="TCM_DATA_HOLD" value="20" />
  <parameter name="TCM_MAX_PENDING_READ_TRANSACTIONS" value="3" />
  <parameter name="TCM_TURNAROUND_TIME" value="2" />
  <parameter name="TCM_TIMING_UNITS" value="0" />
  <parameter name="TCM_READLATENCY" value="2" />
  <parameter name="TCM_SYMBOLS_PER_WORD" value="2" />
  <parameter name="USE_READDATA" value="1" />
  <parameter name="USE_WRITEDATA" value="1" />
  <parameter name="USE_READ" value="1" />
  <parameter name="USE_WRITE" value="1" />
  <parameter name="USE_BEGINTRANSFER" value="0" />
  <parameter name="USE_BYTEENABLE" value="0" />
  <parameter name="USE_CHIPSELECT" value="1" />
  <parameter name="USE_LOCK" value="0" />
  <parameter name="USE_ADDRESS" value="1" />
  <parameter name="USE_WAITREQUEST" value="0" />
  <parameter name="USE_WRITEBYTEENABLE" value="0" />
  <parameter name="USE_OUTPUTENABLE" value="0" />
  <parameter name="USE_RESETREQUEST" value="0" />
  <parameter name="USE_IRQ" value="0" />
  <parameter name="USE_RESET_OUTPUT" value="0" />
  <parameter name="ACTIVE_LOW_READ" value="1" />
  <parameter name="ACTIVE_LOW_LOCK" value="0" />
  <parameter name="ACTIVE_LOW_WRITE" value="1" />
  <parameter name="ACTIVE_LOW_CHIPSELECT" value="1" />
  <parameter name="ACTIVE_LOW_BYTEENABLE" value="0" />
  <parameter name="ACTIVE_LOW_OUTPUTENABLE" value="0" />
  <parameter name="ACTIVE_LOW_WRITEBYTEENABLE" value="0" />
  <parameter name="ACTIVE_LOW_WAITREQUEST" value="0" />
  <parameter name="ACTIVE_LOW_BEGINTRANSFER" value="0" />
  <parameter name="ACTIVE_LOW_RESETREQUEST" value="0" />
  <parameter name="ACTIVE_LOW_IRQ" value="0" />
  <parameter name="ACTIVE_LOW_RESET_OUTPUT" value="0" />
  <parameter name="CHIPSELECT_THROUGH_READLATENCY" value="0" />
  <parameter name="IS_MEMORY_DEVICE" value="1" />
  <parameter name="MODULE_ASSIGNMENT_KEYS">embeddedsw.configuration.hwClassnameDriverSupportList,embeddedsw.configuration.hwClassnameDriverSupportDefault,embeddedsw.CMacro.SETUP_VALUE,embeddedsw.CMacro.WAIT_VALUE,embeddedsw.CMacro.HOLD_VALUE,embeddedsw.CMacro.TIMING_UNITS,embeddedsw.CMacro.SIZE,embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH,embeddedsw.memoryInfo.HAS_BYTE_LANE,embeddedsw.memoryInfo.IS_FLASH,embeddedsw.memoryInfo.GENERATE_DAT_SYM,embeddedsw.memoryInfo.GENERATE_FLASH,embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR,embeddedsw.memoryInfo.FLASH_INSTALL_DIR</parameter>
  <parameter name="MODULE_ASSIGNMENT_VALUES">altera_avalon_lan91c111:altera_avalon_cfi_flash,altera_avalon_cfi_flash,60,100,20,ns,16777216u,16,1,1,1,1,SIM_DIR,APP_DIR</parameter>
  <parameter name="INTERFACE_ASSIGNMENT_KEYS">embeddedsw.configuration.isFlash,embeddedsw.configuration.isMemoryDevice,embeddedsw.configuration.isNonVolatileStorage</parameter>
  <parameter name="INTERFACE_ASSIGNMENT_VALUES" value="1,1,1" />
  <parameter name="CLOCK_RATE" value="75000000" />
  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="2" />
  <parameter name="AUTO_CLK_RESET_DOMAIN" value="2" />
  <parameter name="AUTO_TRISTATECONDUIT_MASTERS" value="" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV GX" />
 </module>
 <module
   kind="altera_tristate_conduit_bridge"
   version="12.0"
   enabled="1"
   name="ext_flash_bridge">
  <parameter name="INTERFACE_INFO"><![CDATA[<info><slave name="tcs"><master name="ext_flash.tcm"><pin role="" width="1" type="Invalid" output_name="" output_enable_name="" input_name="" /><pin role="address" width="24" type="Output" output_name="tcm_address_out" output_enable_name="" input_name="" /><pin role="write_n" width="1" type="Output" output_name="tcm_write_n_out" output_enable_name="" input_name="" /><pin role="data" width="16" type="Bidirectional" output_name="tcm_data_out" output_enable_name="tcm_data_outen" input_name="tcm_data_in" /><pin role="read_n" width="1" type="Output" output_name="tcm_read_n_out" output_enable_name="" input_name="" /><pin role="chipselect_n" width="1" type="Output" output_name="tcm_chipselect_n_out" output_enable_name="" input_name="" /></master></slave></info>]]></parameter>
  <parameter name="AUTO_CLK_CLOCK_RATE" value="75000000" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV GX" />
 </module>
 <module
   kind="altera_avalon_timer"
   version="12.0"
   enabled="1"
   name="sys_timer">
  <parameter name="alwaysRun" value="false" />
  <parameter name="counterSize" value="32" />
  <parameter name="fixedPeriod" value="false" />
  <parameter name="period" value="1" />
  <parameter name="periodUnits" value="MSEC" />
  <parameter name="resetOutput" value="false" />
  <parameter name="snapshot" value="true" />
  <parameter name="systemFrequency" value="75000000" />
  <parameter name="timeoutPulseOutput" value="false" />
  <parameter name="timerPreset" value="CUSTOM" />
 </module>
 <module kind="sd_controller" version="1.0" enabled="1" name="sd_card">
  <parameter name="IDLE" value="0" />
  <parameter name="SHIFT_OUT_CMD" value="1" />
  <parameter name="WAIT_FOR_RSP_START" value="2" />
  <parameter name="SHIFT_IN_CMD_RSP" value="3" />
  <parameter name="WAIT_FOR_DATA_START" value="4" />
  <parameter name="SHIFT_IN_DATA" value="5" />
  <parameter name="SHIFT_IN_CRC16" value="6" />
  <parameter name="SHIFT_OUT_DATA_TOKEN" value="7" />
  <parameter name="SHIFT_OUT_DATA" value="8" />
  <parameter name="SHIFT_OUT_CRC16" value="9" />
  <parameter name="SHIFT_IN_DATA_RSP" value="10" />
  <parameter name="DATA_BUSY" value="11" />
  <parameter name="ERROR_STATE" value="12" />
  <parameter name="WAIT" value="13" />
  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="75000000" />
 </module>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.instruction_master"
   end="CPU.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x2000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="CPU.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x2000" />
 </connection>
 <connection kind="clock" version="12.0" start="clk_0.clk" end="DDR2.refclk" />
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="CPU.clk" />
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="RAM.clk1" />
 <connection
   kind="clock"
   version="12.0"
   start="DDR2.sysclk"
   end="epcs_flash_controller.clk" />
 <connection kind="reset" version="12.0" start="clk_0.clk_reset" end="CPU.reset_n" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="CPU.reset_n" />
 <connection kind="reset" version="12.0" start="clk_0.clk_reset" end="RAM.reset1" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="RAM.reset1" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="epcs_flash_controller.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="epcs_flash_controller.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="DDR2.global_reset_n" />
 <connection kind="avalon" version="12.0" start="CPU.data_master" end="DDR2.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x08000000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.instruction_master"
   end="DDR2.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x08000000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.instruction_master"
   end="epcs_flash_controller.epcs_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="epcs_flash_controller.epcs_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection kind="avalon" version="12.0" start="CPU.data_master" end="RAM.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x8000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.instruction_master"
   end="RAM.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x8000" />
 </connection>
 <connection
   kind="interrupt"
   version="12.0"
   start="CPU.d_irq"
   end="epcs_flash_controller.irq">
  <parameter name="irqNumber" value="5" />
 </connection>
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="jtag_uart.clk" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="jtag_uart.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="jtag_uart.reset" />
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="jtag_uart.avalon_jtag_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x30c0" />
 </connection>
 <connection kind="interrupt" version="12.0" start="CPU.d_irq" end="jtag_uart.irq">
  <parameter name="irqNumber" value="3" />
 </connection>
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="DDR2.soft_reset_n" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="DDR2.soft_reset_n" />
 <connection
   kind="clock"
   version="12.0"
   start="DDR2.sysclk"
   end="descriptor_memory.clk1" />
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="descriptor_memory.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
 </connection>
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="descriptor_memory.reset1" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="descriptor_memory.reset1" />
 <connection
   kind="avalon_streaming"
   version="12.0"
   start="sgdma_tx.out"
   end="tse_mac.transmit" />
 <connection
   kind="avalon_streaming"
   version="12.0"
   start="tse_mac.receive"
   end="sgdma_rx.in" />
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="tse_mac.control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x2800" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="sgdma_rx.descriptor_read"
   end="descriptor_memory.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="sgdma_rx.descriptor_write"
   end="descriptor_memory.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="sgdma_tx.descriptor_read"
   end="descriptor_memory.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="sgdma_tx.descriptor_write"
   end="descriptor_memory.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
 </connection>
 <connection kind="avalon" version="12.0" start="sgdma_tx.m_read" end="DDR2.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x08000000" />
 </connection>
 <connection kind="avalon" version="12.0" start="sgdma_rx.m_write" end="DDR2.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x08000000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="sgdma_rx.csr">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x3000" />
 </connection>
 <connection
   kind="interrupt"
   version="12.0"
   start="CPU.d_irq"
   end="sgdma_rx.csr_irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="sgdma_tx.csr">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x3040" />
 </connection>
 <connection
   kind="interrupt"
   version="12.0"
   start="CPU.d_irq"
   end="sgdma_tx.csr_irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="sgdma_tx.clk" />
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="sgdma_rx.clk" />
 <connection
   kind="clock"
   version="12.0"
   start="DDR2.sysclk"
   end="tse_mac.receive_clock_connection" />
 <connection
   kind="clock"
   version="12.0"
   start="DDR2.sysclk"
   end="tse_mac.transmit_clock_connection" />
 <connection
   kind="clock"
   version="12.0"
   start="DDR2.sysclk"
   end="tse_mac.control_port_clock_connection" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="tse_mac.reset_connection" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="tse_mac.reset_connection" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="sgdma_tx.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="sgdma_tx.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="sgdma_rx.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="sgdma_rx.reset" />
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="led_pio.clk" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="led_pio.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="led_pio.reset" />
 <connection kind="avalon" version="12.0" start="CPU.data_master" end="led_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x30a0" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="ext_flash.uas">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x02000000" />
 </connection>
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.instruction_master"
   end="ext_flash.uas">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x02000000" />
 </connection>
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="button_pio.clk" />
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="ext_flash.clk" />
 <connection
   kind="clock"
   version="12.0"
   start="DDR2.sysclk"
   end="ext_flash_bridge.clk" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="button_pio.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="button_pio.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="ext_flash.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="ext_flash.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="ext_flash_bridge.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="ext_flash_bridge.reset" />
 <connection
   kind="tristate_conduit"
   version="12.0"
   start="ext_flash.tcm"
   end="ext_flash_bridge.tcs" />
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="button_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x30b0" />
 </connection>
 <connection
   kind="interrupt"
   version="12.0"
   start="CPU.d_irq"
   end="button_pio.irq">
  <parameter name="irqNumber" value="4" />
 </connection>
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="sys_timer.clk" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="sys_timer.reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="sys_timer.reset" />
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="sys_timer.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x3080" />
 </connection>
 <connection kind="interrupt" version="12.0" start="CPU.d_irq" end="sys_timer.irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection kind="clock" version="12.0" start="DDR2.sysclk" end="sd_card.clock" />
 <connection
   kind="reset"
   version="12.0"
   start="clk_0.clk_reset"
   end="sd_card.clock_reset" />
 <connection
   kind="reset"
   version="12.0"
   start="CPU.jtag_debug_module_reset"
   end="sd_card.clock_reset" />
 <connection
   kind="avalon"
   version="12.0"
   start="CPU.data_master"
   end="sd_card.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x2c00" />
 </connection>
</system>
