Quartus II Archive log --	D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/NIOS_SOC_tmp_archive.qarlog

Archive:	D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/NIOS_SOC_tmp_archive.qar
Date:		Mon Aug 20 16:55:47 2012
Quartus II 32-bit		12.0 Build 232 07/05/2012 SP 1 SJ Full Version

	=========== Files Selected: ===========
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS.qsys
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS.sopcinfo
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/FULL_SYS.qip
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/FULL_SYS.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU.ocp
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU.sdc
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_bht_ram.mif
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_dc_tag_ram.mif
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_ic_tag_ram.mif
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_jtag_debug_module_sysclk.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_jtag_debug_module_tck.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_jtag_debug_module_wrapper.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_mult_cell.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_oci_test_bench.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_ociram_default_contents.mif
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_rf_ram_a.mif
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_rf_ram_b.mif
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_CPU_test_bench.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_alt_mem_ddrx_controller_top.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_controller_phy.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_ex_lfsr8.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_example_driver.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_example_top.sdc
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_example_top.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_full_mem_model.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_mem_model.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_alt_mem_phy.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_alt_mem_phy_pll.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_alt_mem_phy_seq.vhd
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_alt_mem_phy_seq_wrapper.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_ddr_pins.tcl
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_ddr_timing.sdc
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_ddr_timing.tcl
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_report_timing.tcl
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_phy_report_timing_core.tcl
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_DDR2_pin_assignments.tcl
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_RAM.hex
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_RAM.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_addr_router.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_addr_router_001.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_addr_router_002.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_addr_router_006.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_button_pio.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_cmd_xbar_demux.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_cmd_xbar_demux_001.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_cmd_xbar_demux_002.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_cmd_xbar_mux.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_cmd_xbar_mux_001.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_cmd_xbar_mux_006.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_descriptor_memory.hex
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_descriptor_memory.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_epcs_flash_controller.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_epcs_flash_controller_boot_rom_synth.hex
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_ext_flash.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_ext_flash_bridge.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_id_router.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_id_router_001.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_id_router_004.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_id_router_005.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_id_router_006.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_irq_mapper.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_jtag_uart.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_jtag_uart_input_mutex.dat
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_jtag_uart_input_stream.dat
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_jtag_uart_output_stream.dat
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_led_pio.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_rsp_xbar_demux.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_rsp_xbar_demux_001.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_rsp_xbar_demux_006.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_rsp_xbar_mux.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_rsp_xbar_mux_001.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_sgdma_rx.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_sgdma_tx.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_sys_timer.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_tse_mac.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_tse_mac_constraints.sdc
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_tse_mac_constraints.tcl
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/FULL_SYS_tse_mac_loopback.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_addr_cmd.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_addr_cmd_wrap.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_arbiter.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_buffer.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_buffer_manager.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_burst_gen.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_burst_tracking.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_cmd_gen.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_controller.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_controller_st_top.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_csr.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_dataid_manager.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ddr2_odt_gen.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ddr3_odt_gen.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_define.iv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ecc_decoder.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ecc_decoder_32_syn.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ecc_decoder_64_syn.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ecc_encoder.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ecc_encoder_32_syn.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ecc_encoder_64_syn.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_fifo.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_input_if.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_list.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_lpddr2_addr_cmd.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_mm_st_converter.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_odt_gen.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_rank_timer.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_rdata_path.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_rdwr_data_tmg.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_sideband.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_tbp.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_timing_param.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_ddrx_wdata_path.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/alt_mem_phy_defines.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_avalon_sc_fifo.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_avalon_st_pipeline_base.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_arbitrator.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_burst_adapter.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_burst_uncompressor.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_master_agent.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_master_translator.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_slave_agent.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_slave_translator.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_traffic_limiter.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_merlin_width_adapter.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_reset_controller.sdc
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_reset_controller.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_reset_synchronizer.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tristate_controller_aggregator.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tristate_controller_translator.sv
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_a_fifo_13.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_a_fifo_24.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_a_fifo_34.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_a_fifo_opt_1246.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_a_fifo_opt_14_44.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_a_fifo_opt_36_10.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_align_sync.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_alt2gxb_arriagx.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_alt2gxb_basic.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_alt2gxb_gige.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_alt2gxb_gige_wo_rmfifo.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_alt4gxb_gige.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_alt4gxb_gige_wo_rmfifo.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_altgx_civgx_gige.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_altgx_civgx_gige_wo_rmfifo.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_altshifttaps.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_altsyncram_dpm_fifo.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_avst_to_gmii_if.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_bin_cnt.v
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D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_tx_ff_cntrl_32.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_tx_ff_cntrl_32_shift16.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_tx_ff_length.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_tx_ff_read_cntl.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_tx_min_ff.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_tx_stat_extract.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/altera_tse_xcvr_resync.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/sd_controller.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS/synthesis/submodules/sd_data_ram.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/FULL_SYS_DDR2_phy_autodetectedpins.tcl
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/NIOS_SOC.bdf
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/NIOS_SOC.qpf
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/NIOS_SOC.qsf
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/NIOS_SOC_assignment_defaults.qdf
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/assignment_defaults.qdf
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/full.sdc
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gen_reset_n.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio.bsf
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio.cmp
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio.inc
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio.ppf
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio.qip
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio_bb.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/gtx_ddio_inst.v
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/incremental_db/compiled_partitions/NIOS_SOC.db_info
D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/stp1.stp
	======= Total: 330 files to archive =======

	================ Status: ===============
All files archived successfully.


******* Archived project restoration attempt on Mon Aug 20 16:55:53 2012
Source archive file:	D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse/NIOS_SOC_tmp_archive.qar
Archive was extracted into	D:/Work_Dir/Demos/cytech_kit/Easy_GX/NIOS_TEST_tse_pcie/
		 - successfully.
