Altera
Altera A10 SOC HPS UART Configuration and Debugging
Altera 40G Ethernet IP Loopback Test
Three Implementations of Reserved Memory for ARM-FPGA Communication in Linux
Linux UIO ARM-FPGA Communication Interrupt Handling Scheme
Altera Agilex™ 7 400G Ethernet IP and FPC202
Altera S10 DDR Calibration Issues and Experience Sharing
Release Date
2015-06-15
Altera Reveals Stratix 10 Innovations Enabling the Industry’s Fastest and Highest Capacity FPGAs and SoCs
Innovations Deliver 2X Performance, 5.5 Million Logic Elements, Heterogeneous 3D System-in Package Integration, and Most Comprehensive Security Capabilities
News Highlights:
Release Date
2012-06-28
New Quartus II Software v12.0
Achieve up to 4X Faster Compile Times!
The new Quartus® II software v12.0 delivers up to 4X faster compile times for Stratix® V FPGA designs. This version also lets you head start your Cyclone® V SoC FPGA development and further improves your productivity with enhancements to the Qsys system integration tool.